Description : Significant progress has been made in advanced packaging in recent years. Several new packaging techniques have been developed and new packaging materials have been introduced. This book provides a comprehensive overview of the recent developments in this industry, particularly in the areas of microelectronics, optoelectronics, digital health, and bio-medical applications. The book discusses established techniques, as well as emerging technologies, in order to provide readers with the most up-to-date developments in advanced packaging.
Description : Advanced Flip Chip Packaging presents past, present and future advances and trends in areas such as substrate technology, material development, and assembly processes. Flip chip packaging is now in widespread use in computing, communications, consumer and automotive electronics, and the demand for flip chip technology is continuing to grow in order to meet the need for products that offer better performance, are smaller, and are environmentally sustainable.
Description : Microelectronic packaging has been recognized as an important "enabler" for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.
Description : Although there is increasing need for modeling and simulation in the IC package design phase, most assembly processes and various reliability tests are still based on the time consuming "test and try out" method to obtain the best solution. Modeling and simulation can easily ensure virtual Design of Experiments (DoE) to achieve the optimal solution. This has greatly reduced the cost and production time, especially for new product development. Using modeling and simulation will become increasingly necessary for future advances in 3D package development. In this book, Liu and Liu allow people in the area to learn the basic and advanced modeling and simulation skills to help solve problems they encounter. Models and simulates numerous processes in manufacturing, reliability and testing for the first time Provides the skills necessary for virtual prototyping and virtual reliability qualification and testing Demonstrates concurrent engineering and co-design approaches for advanced engineering design of microelectronic products Covers packaging and assembly for typical ICs, optoelectronics, MEMS, 2D/3D SiP, and nano interconnects Appendix and color images available for download from the book's companion website Liu and Liu have optimized the book for practicing engineers, researchers, and post-graduates in microelectronic packaging and interconnection design, assembly manufacturing, electronic reliability/quality, and semiconductor materials. Product managers, application engineers, sales and marketing staff, who need to explain to customers how the assembly manufacturing, reliability and testing will impact their products, will also find this book a critical resource. Appendix and color version of selected figures can be found at www.wiley.com/go/liu/packaging
Description : The focus behind this book on wafer bonding is the fast paced changes in the research and development in three-dimensional (3D) integration, temporary bonding and micro-electro-mechanical systems (MEMS) with new functional layers. Written by authors and edited by a team from microsystems companies and industry-near research organizations, this handbook and reference presents dependable, first-hand information on bonding technologies. Part I sorts the wafer bonding technologies into four categories: Adhesive and Anodic Bonding; Direct Wafer Bonding; Metal Bonding; and Hybrid Metal/Dielectric Bonding. Part II summarizes the key wafer bonding applications developed recently, that is, 3D integration, MEMS, and temporary bonding, to give readers a taste of the significant applications of wafer bonding technologies. This book is aimed at materials scientists, semiconductor physicists, the semiconductor industry, IT engineers, electrical engineers, and libraries.
Description : This text covers ball grid array (BGA) design and manufacturing. BGA is a relatively new way of connecting leads from an integrated circuit package to a printed circuit board, allowing a higher pin count and function density than other connection methods and giving the lowest signal delay. These features make it an important component of modern high performance systems, but the density of leads makes manufacturing and process control very difficult.
Description : Graduate textbook on important class of semiconductor device for electronic engineering, physics and materials science.